Head Units and Cluster

The Automotive Audio Bus (A²B^®) provides a multichannel, I²S/TDM link over distances of up to 15 m between nodes. It embeds bidirectional synchronous pulse-code modulation (PCM) data (for example, digital audio), clock, and synchronization signals onto a single differential wire pair. A²B supports a direct point to point connection and allows multiple, daisy-chained nodes at different locations to contribute and/or consume time division multiplexed (TDM) channel content.

A²B is a single-master, multiple-slave system where the transceiver at the host controller is the master. The master generates clock, synchronization, and framing for all slave nodes. The master A²B transceiver is programmable over a control port (I²C) for configuration and read back. An extension of this control port is embedded in the A²B data stream, which grants direct access of registers and status information on slave transceivers as well as I²C to I²C communication over distance.

The transceiver can connect directly to general-purpose digital signal processors (DSPs), field-programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), microphones, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and codecs through a multichannel I²S/TDM interface. It also provides a pulse density modulation (PDM) interface for direct connection of up to four PDM digital microphones.

Finally, the transceiver also supports an A²B bus powering feature, where the master node supplies voltage and current to the slave nodes over the same daisy-chained, twisted pair wire cable as used for the communication link.

¹ N/A means not applicable.
² PDM microphones must be connected to the DRX0/IO5 pin.

Applications

• Audio communication link
• Microphone arrays
  
  • Beamforming
  • Hands free and in car communication
• Active and road noise cancellation
• Audio/video conferencing systems

The Automotive Audio Bus (A²B^®) provides a multichannel, I²S/TDM link over distances of up to 15 m between nodes. It embeds bidirectional synchronous pulse-code modulation (PCM) data (for example, digital audio), clock, and synchronization signals onto a single differential wire pair. A²B supports a direct point to point connection and allows multiple, daisy-chained nodes at different locations to contribute and/or consume time division multiplexed (TDM) channel content.

A²B is a single-master, multiple-slave system where the transceiver at the host controller is the master. The master generates clock, synchronization, and framing for all slave nodes. The master A²B transceiver is programmable over a control port (I²C) for configuration and read back. An extension of this control port is embedded in the A²B data stream, which grants direct access of registers and status information on slave transceivers as well as I²C to I²C communication over distance.

The transceiver can connect directly to general-purpose digital signal processors (DSPs), field-programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), microphones, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and codecs through a multichannel I²S/TDM interface. It also provides a pulse density modulation (PDM) interface for direct connection of up to four PDM digital microphones.

Finally, the transceiver also supports an A²B bus powering feature, where the master node supplies voltage and current to the slave nodes over the same daisy-chained, twisted pair wire cable as used for the communication link.

¹ N/A means not applicable.
² PDM microphones must be connected to the DRX0/IO5 pin.

Applications

• Audio communication link
• Microphone arrays
  
  • Beamforming
  • Hands free and in car communication
• Active and road noise cancellation
• Audio/video conferencing systems

The Automotive Audio Bus (A²B^®) provides a multichannel, I²S/TDM link over distances of up to 15 m between nodes. It embeds bidirectional synchronous pulse-code modulation (PCM) data (for example, digital audio), clock, and synchronization signals onto a single differential wire pair. A²B supports a direct point to point connection and allows multiple, daisy-chained nodes at different locations to contribute and/or consume time division multiplexed (TDM) channel content.

A²B is a single-master, multiple-slave system where the transceiver at the host controller is the master. The master generates clock, synchronization, and framing for all slave nodes. The master A²B transceiver is programmable over a control port (I²C) for configuration and read back. An extension of this control port is embedded in the A²B data stream, which grants direct access of registers and status information on slave transceivers as well as I²C to I²C communication over distance.

The transceiver can connect directly to general-purpose digital signal processors (DSPs), field-programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), microphones, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and codecs through a multichannel I²S/TDM interface. It also provides a pulse density modulation (PDM) interface for direct connection of up to four PDM digital microphones.

Finally, the transceiver also supports an A²B bus powering feature, where the master node supplies voltage and current to the slave nodes over the same daisy-chained, twisted pair wire cable as used for the communication link.

¹ N/A means not applicable.
² PDM microphones must be connected to the DRX0/IO5 pin.

Applications

• Audio communication link
• Microphone arrays
  
  • Beamforming
  • Hands free and in car communication
• Active and road noise cancellation
• Audio/video conferencing systems

The ADAU1462/ADAU1466 are automotive qualified audio processors that far exceed the digital signal processing capabilities of earlier SigmaDSP^® devices. They are pin and register compatible with each other, as well as with the ADAU1450/ADAU1451/ADAU1452 SigmaDSP processors. The restructured hardware architecture is optimized for efficient audio processing. The audio processing algorithms support a seamless combination of stream processing (sample by sample), multirate processing, and block processing paradigms. The SigmaStudio™ graphical programming tool enables the creation of signal processing flows that are interactive, intuitive, and powerful. The enhanced digital signal processor (DSP) core architecture enables some types of audio processing algorithms to be executed using significantly fewer instructions than were required on previous SigmaDSP generations, leading to vastly improved code efficiency.

The 1.2 V, 32-bit DSP core can run at frequencies of up to 294.912 MHz and execute up to 6144 SIMD instructions per sample at the standard sample rate of 48 kHz. Powerful clock generator hardware, including a flexible phase-locked loop (PLL) with multiple fractional integer outputs, supports all industry standard audio sample rates. Nonstandard rates over a wide range can generate up to 15 sample rates simultaneously. These clock generators, along with the on board asynchronous sample rate converters (ASRCs) and a flexible hardware audio routing matrix, make the ADAU1462/ADAU1466 ideal audio hubs that greatly simplify the design of complex multirate audio systems.

The ADAU1462/ADAU1466 interface with a wide range of analog-to-digital converters (ADCs), digital-to-analog converters (DACs), digital audio devices, amplifiers, and control circuitry with highly configurable serial ports, I2C, serial peripheral interface (SPI), Sony/Philips Digital Interconnect Format (S/PDIF) interfaces, and multipurpose input/output (I/O) pins. Dedicated decimation filters can decode the pulse code modulation (PDM) output of up to four MEMS microphones.

Independent slave and master I²C/SPI control ports allow the ADAU1462/ADAU1466 to be programmed and controlled by an external master device such as a microcontroller, and to program and control slave peripherals directly. Self boot functionality and the master control port enable complex standalone systems.

The power efficient DSP core can execute at high computational loads while consuming only a few hundred milliwatts (mW) in typical conditions. This relatively low power consumption and small footprint make the ADAU1462/ADAU1466 ideal replacements for large, general-purpose DSPs that consume more power at the same processing load.

Applications

• Automotive audio processing
  
  • Head units
  • Distributed amplifiers
  • Rear seat entertainment systems
  • Trunk amplifiers
• Commercial and professional audio processing

The ADSP-SC57x/ADSP-2157x processors are members of the SHARC^® family of products. The ADSP-SC57x processor is based on the SHARC+^® dual-core and the arm^® Cortex^®-A5 core. The ADSP-SC57x/ADSP-2157x SHARC processors are members of the single-instruction, multiple data (SIMD) SHARC family of digital signal processors (DSPs) that feature Analog Devices Super Harvard Architecture. These 32-bit/40-bit/64-bit floating-point processors are optimized for high performance audio/floating-point applications with large on-chip static random-access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and innovative digital audio interfaces (DAI). New additions to the SHARC+ core include cache enhancements and branch prediction, while maintaining instruction set compatibility to previous SHARC products.

By integrating a set of industry leading system peripherals and memory, the arm^® Cortex-A5 and SHARC processor is the platform of choice for applications that require programmability similar to reduced instruction set computing (RISC), multimedia support, and leading edge signal processing in one integrated package. These applications span a wide array of markets, including automotive, professional audio, and industrial-based applications that require high floating-point performance.

The ADV7282A has the same pinout as and is software compatible with the ADV7282. The mobile industry processor interface (MIPI^®) model of the ADV7282A (ADV7282A-M) has the same pinout as and is software compatible with the ADV7282-M.

All features, functionality, and specifications are shared by the ADV7282A and the ADV7282A-M, unless otherwise noted.

The ADV7282A is a versatile one-chip, multiformat video decoder that automatically detects standard analog baseband video signals and converts them into YCrCb 4:2:2 component video data streams.

The analog input of the ADV7282A features an input mux (4-channel on ADV7282A, 6-channel on ADV7282A-M), a single 10-bit analog-to-digital converter (ADC) and an on-chip differential to single-ended converter to accommodate the direct connection of differential, pseudo differential, or single-ended CVBS without the need for external amplifier circuitry.

The standard definition processor (SDP) in the ADV7282A automatically detects PAL, NTSC and SECAM standards in the form of composite, S-Video (Y/C) and component. The analog video is converted into a 4:2:2 component video data stream that is output either via an 8-bit ITU-R BT.656 standard-compatible interface (ADV7282A) or via a MIPI CSI-2 Tx (hereafter referred to as MIPI Tx) interface (ADV7282A-M). The ADV7282A also feature a deinterlacer for interlaced to progressive (I²P) conversion.

The ADV7282A offers short to battery (STB) diagnostic sense inputs and general-purpose outputs.

The ADV7282A is provided in a space-saving LFCSP surface-mount, RoHS compliant package. The ADV7282A is rated over the −40°C to +105°C temperature range, making it ideal for automotive applications.

The ADV7282A must be configured in accordance with the I²C writes provided in the evaluation board script files.

Applications

• Advanced driver assistance
• Automotive infotainment
• DVRs for video security
• Media players

The ADV7481 MHL 2.1 capable receiver supports a maximum pixel clock frequency of 75 MHz, allowing resolutions up to 720p/1080i at 60 Hz in 24-bit mode. The ADV7481 features a link control bus (CBUS) that handles the link layer, translation layer, CBUS electrical discovery, and display data channel (DDC) commands. The implementation of the MHL sideband channel (MSC) commands by the system processor can be handled either by the I2C bus, or via a dedicated serial peripheral interface (SPI) bus. A dedicated interrupt pin (INTRQ3) is available to indicate that events related to CBUS have occurred.

The ADV7481 also features an enable pin (VBUS_EN) to dynamically enable or disable the output of a voltage regulator, which provides a 5 V voltage bus (VBUS) signal to the MHL source.

The ADV7481 HDMI capable receiver supports a maximum pixel clock frequency of 162 MHz, allowing HDTV formats up to 1080p, and display resolutions up to UXGA (1600 × 1200 at 60 Hz). The device integrates a consumer electronics control (CEC) controller that supports the capability discovery and control (CDC) feature. The HDMI input port has dedicated 5 V detect and Hot Plug™ assert pins.

The HDMI/MHL receiver includes an adaptive transition minimized differential signaling (TMDS) equalizer that ensures robust operation of the interface with long cables.

The ADV7481 single receiver port is capable of accepting both HDMI and MHL electrical signals. Automatic detection between HDMI and MHL is achieved by using cable impedance detection through the CD_SENSE pin.

The ADV7481 contains a component processor (CP) that processes the video signals from the HDMI/MHL receiver. It provides features such as contrast, brightness, and saturation adjustments, as well as free run and timing adjustment controls for HS/VS/DE timing.

The ADV7481 analog front end (AFE) comprises a single high speed, 10-bit analog-to-digital converter (ADC) that digitizes the analog video signal before applying it to the SDP.

The eight analog video inputs can accept single-ended, pseudo differential, and fully differential composite video signals, as well as S-Video and YPbPr video signals, supporting a wide range of consumer and automotive video sources.

Short to battery (STB) events can be detected on differential input video signals. STB protection is provided by ac coupling the input video signals. The ADV7481, in combination with an external resistor divider, provides a common-mode input range of 4 V, enabling the removal of large signal common-mode transients present on the video lines.

The automatic gain control (AGC) and clamp restore circuitry allow an input video signal up to 1.0 V p-p at the analog video input pins of the ADV7481. Alternatively, the AGC and clamp restore circuitry can be bypassed for manual settings.

The SDP of the ADV7481 is capable of decoding a large selection of analog baseband video signals in composite, S-Video, and component formats. The SDP supports worldwide NTSC, PAL, and SECAM standards.

The ADV7481 features an 8-bit digital input/output port, supporting input and output video resolutions up to 720p/1080i in both the 8-bit interleaved 4:2:2 SDR and DDR modes.

APPLICATIONS

• Portable devices
• Automotive infotainment (head unit and rear seat
  entertainment systems)
• HDMI repeaters and video switches

The ADV7613 is a high quality, low power, single-input HDMI to LVDS display bridge. It incorporates an HDMI capable receiver that supports up to 1080p, 60 Hz.

The HDMI port has dedicated 5 V detect and hot plug assert pins. The HDMI receiver also includes an integrated equalizer that ensures the robust operation of the interface with long cables.

The ADV7613 has an audio output port for the audio data extracted from the HDMI stream. HDMI audio formats include super audio CD (SACD) via Direct Stream Digital^® (DSD) and HBR. The HDMI receiver has an advanced mute controller that prevents audible extraneous noise in the audio output.

The ADV7613 contains a component processor (CP) that processes the video signals from the HDMI receiver. It provides features such as contrast, brightness and saturation adjustments, STDI detection block, free run, and synchronization alignment controls.

The LVDS encoder can package data into 6-bit or 8-bit non-dc balanced OpenLDI mapping or 8-bit VESA mapping. The ADV7613 can output 24-bit OpenLDI data via dual-channel LVDS transmitters, up to a maximum resolution of 1080p, 60 Hz received at the input. The maximum output clock supported by a single LVDS output port is 92 MHz.

The ADV7613 is offered in an automotive grade and a consumer grade. The operating temperature range is −40°C to +85°C.

Fabricated in an advanced CMOS process, the ADV7613 is provided in a 9 mm × 9 mm, 100-ball CSP_BGA, RoHS-compliant package.

Applications

• Projectors
• Automotive infotainment headunits
• Automotive infotainment displays
• Digital signage

The LT3922-1 is a monolithic, synchronous, step-up DC/ DC converter that utilizes fixed-frequency, peak current control and provides PWM dimming for a string of LEDs. The LED current is programmed by an analog voltage or the duty cycle of pulses at the CTRL pin. The LT3922-1 will maintain ±2.5% current regulation through an external sense resistor over a wide range of output voltages.

The switching frequency is programmable from 200kHz to 2MHz by an external resistor at the RT pin or by an external clock applied at the SYNC/SPRD pin. With the optional spread spectrum frequency modulation enabled, the frequency varies from 100% to 125% to reduce EMI. The LT3922-1 also includes a driver for an external high side PMOS for PWM dimming and an internal PWM signal generator for analog control of PWM dimming. When an external signal is available, the LT3922-1 can perform 25,000:1 PWM dimming with 100Hz PWM pulses.

Additional features include an accurate external reference voltage for use with the CTRL and PWM pins, an LED current monitor, an accurate EN/UVLO pin threshold, open-drain fault reporting for open-circuit and short-circuit load conditions, and thermal shutdown.

APPLICATIONS

• Automotive and Industrial Lighting
• Machine Vision

The circuit shown in Figure 1 is an isolated smart industrial field instrument that interfaces to many types of analog sensors such as temperature (Pt100, Pt1000, and thermocouple) or bridge pressure sensors. The instrument communicates via a 4 mA to 20 mA analog output and a highway addressable remote transducer (HART^®) interface. HART is a digital 2-way communication in which a 1 mA peak-to-peak frequency shift keyed (FSK) signal is modulated on top of the standard 4 mA to 20 mA analog current signal. The HART interface allows features such as remote calibration, fault interrogation, and transmission of process variables, which are necessary in applications such as temperature and pressure control.

The circuit uses the AD7124-4, an ultralow power, precision 24-bit, Σ-Δ analog-to-digital converter (ADC), which includes all the features needed for temperature and pressure systems. The circuit also includes the AD5421, a 16-bit, 4 mA to 20 mA, loop powered digital-to-analog converter (DAC); the AD5700, the industry’s lowest power and smallest footprint HART-compliant IC modem; the ADuM1441, which provides ultralow power serial peripheral interface (SPI) isolation; the ADG5433 CMOS switch; and the ADP162 low power, 3.3 V regulator in the isolated power circuitry.

The circuit shown in Figure 1 combines the  AD5755-1 (quad channel voltage and current output DAC with dynamic power control) and the AD5700-1 HART modem, to give a completely isolated multiplexed HART^®1 analog output solution. Power can be provided either from the transformer isolated power circuit provided on the board (±13 V and +5.2 V outputs, dependent on the load current) or from external power supplies connected to terminal blocks. This circuit is suitable for use in programmable logic controllers (PLCs) and distributed control system (DCS) modules that require multiple HART-compatible 4 mA to 20 mA current outputs, along with unipolar or bipolar voltage outputs. External transient protection circuitry is also included, which is important for applications located in harsh industrial environments.

The AD5755-1 DAC is software configurable and allows the user to easily program the required output ranges and dc-to-dc converter settings used for dynamic power control. It allows access to all of the internal control registers, including the slew rate control register, which is important for applications using HART communication.

The AD5700-1 is the lowest power and smallest footprint HART-compliant IC modem in the industry. It operates as a HART frequency shift keying (FSK) half-duplex modem and integrates all of the necessary signal detection, modulating, demodulating, and signal generation functions. It contains a 0.5% precision internal oscillator, thus reducing board space requirements and cost. The AD5700-1 uses a standard UART interface.

Digital isolation is provided using the quad and dual channel ADuM3481/ADuM3210 digital isolator components based on Analog Devices, Inc., iCoupler^® technology. The use of iCoupler technology reduces the need for the additional external components often required in solutions based on optoisolators. An external transformer is used to transfer power across the isolation barrier.

The ADG759 provides multiplexing capability, enabling HART communication, across the four analog output channels. The ADG759 switches one of four differential inputs to a common differential output as determined by the 2-bit binary address lines A0 and A1. When disabled, all channels are switched off. Bypass links are included to provide the flexibility to bypass the multiplexer.

1 HART is a registered trademark of the HART Communication Foundation.

The circuit shown in Figure 1 is a configurable 4 mA-to-20 mA loop-powered transmitter based on an industry-leading micropower instrumentation amplifier. Total unadjusted error is less than 1%. It can be configured with a single switch as either a transmitter (Figure 1) that converts a differential input voltage into a current output, or as a receiver (Figure 5) that converts a 4 mA-to-20 mA current input to a voltage output.

The design is optimized for precision, low noise and low power industrial process control applications. The circuit can accept 0 V to 5V or 0 V to 10 V input range as a transmitter. As a receiver it can provide 0.2 V to 2.3 V or 0.2 V to 4.8 V output range compatible with ADCs using 2.5 V or 5 V references. The supply voltage can range from 12 V to 36 V as a transmitter and 7 V to 36 V as a receiver.

Since the circuit is configurable, a single hardware design can be used as a backup for both transmitter and receiver at the same time, minimizing customer inventory requirements.

The PLL circuit shown in Figure 1 uses a 13 GHz Fractional-N synthesizer, wideband active loop filter and VCO, and has a phase settling time of less than 5 μs to within 5° for a 200 MHz frequency jump.

The performance is achieved using an active loop filter with 2.4 MHz bandwidth. This wide bandwidth loop filter is achievable because of the ADF4159 phase-frequency detector (PFD) maximum frequency of 110 MHz; and the AD8065 op amp high gain-bandwidth product of 145 MHz.

The AD8065 op amp used in the active filter can operate on a 24 V supply voltage that allows control of most wideband VCOs having tuning voltages from 0 V to 18 V.

The circuit shown in Figure 1 is a flexible current transmitter that converts the differential voltage output from a pressure sensor to a 4 mA-to-20 mA current output.

The circuit is optimized for a wide variety of bridge-based voltage or current driven pressure sensors, utilizes only five active devices, and has a total unadjusted error of less than 1%. The power supply voltage can range from 7 V to 36 V depending on the component and sensor driver configuration.

The input of the circuit is protected for ESD and voltages beyond the supply rail, making it ideal for industrial applications.

The circuit shown in Figure 1 is a robust and flexible loop-powered current transmitter that converts the differential voltage output from a pressure sensor to a 4 mA-to-20 mA current output.

The design is optimized for a wide variety of bridge based voltage or current driven pressure sensors, utilizes only four active devices, and has a total unadjusted error of less than 1%. The loop supply voltage can range from 12 V to 36 V.

The input of the circuit is protected for ESD and voltages beyond the supply rail, making it ideal for industrial applications.

The circuit shown in Figure 1 is a completely isolated 4-channel temperature measurement circuit optimized for performance, input flexibility, robustness, and low cost. It supports all types of thermocouples with cold junction compensation and any type of RTD (resistance temperature detector) with resistances up to 4 kΩ for 2-, 3-, or 4-wire connection configurations.

The RTD excitation current are is programmable for optimum noise and linearity performance.

RTD measurements achieve 0.1°C accuracy (typical), and Type-K thermocouple measurements achieve 0.05°C typical accuracy because of the 16-bit ADT7310 digital temperature sensor used for cold-junction compensation. The circuit uses a four-channel AD7193 24-bit sigma-delta ADC with on-chip PGA for high accuracy and low noise.

Input transient and overvoltage protection are provided by low leakage transient voltage suppressors (TVS) and Schottky diodes. The SPI-compatible digital inputs and outputs are isolated (2500 V rms), and the circuit is operated on a fully isolated power supply.

The circuit shown in Figure 1 is a complete solution for the conversion of HDMI/DVI to VGA (HDMI2VGA) with an analog audio output. It uses the low power ADV7611 high-definition multimedia interface (HDMI) receiver capable of receiving video streams up to 165 MHz. The circuit is powered from a USB cable and works for resolutions up to 1600 × 1200 at 60 Hz.

The circuit uses extended display identification data (EDID) content to ensure that the video stream from the HDMI/digital visual interface (DVI) source is at the highest possible resolution supported by the HDMI source, converter, and video graphics adapter (VGA) display.

The HDMI receiver can also be used for video adjustments, such as brightness or contrast, and the audio codec can be used to set the volume of the audio output.

There are numerous benefits of this circuit. The highly integrated video receiver allows video adjustments without the need for additional field-programmable gate arrays (FPGAs). A simple I²C write can adjust brightness, contrast, or change the audio volume. Built-in EDID memory reduces the count of the parts and the real estate. Step-down switching regulators allow the circuit to be powered from a USB port. By using industry-standard interchip connections, direct connections can be made between the receiver, codec, and video digital-to-analog converter (DAC). The circuit was built on a 2-layer printed circuit board (PCB), and it works up to UXGA resolutions (1600 × 1200 at 60 Hz).

This circuit uses the ADuC7060 or the ADuC7061 precision analog microcontroller in an accurate thermocouple temperature monitoring application. The ADuC7060/ADuC7061 integrate dual 24-bit sigma-delta (Σ-Δ) analog-to-digital converters (ADCs), dual programmable current sources, a 14-bit digital-to-analog converter (DAC), and a 1.2 V internal reference, as well as an ARM7 core, 32 kB flash, 4 kB SRAM, and various digital peripherals such as UART, timers, serial peripheral interface (SPI), and I²C interfaces.

In the circuit, the ADuC7060/ADuC7061 are connected to a thermocouple and a 100 Ω platinum resistance temperature detector (RTD). The RTD is used for cold junction compensation. As an extra option, the ADT7311 digital temperature sensor can be used to measure the cold junction temperature instead of the RTD.

In the source code, an ADC sampling rate of 4 Hz was chosen. When the ADC input programmable gain amplifier (PGA) is configured for a gain of 32, the noise-free code resolution of the ADuC7060/ADuC7061 is greater than 18 bits.

The single edge nibble transmission (SENT) interface to the host is implemented by using a timer to control a digital output pin. This digital output pin is then level shifted externally to 5 V using an external NPN transistor. An EMC filter is provided on the SENT output circuit as recommended in Section 6.3.1 of the SENT protocol (SAE J2716 Standard). The data is measured as falling edge to falling edge, and the duration of each pulse is related to the number of system clock ticks. The system clock rate is determined by measuring the SYNC pulse. The SYNC pulse is transmitted at the start of every packet. More details are provided in the SENT Interface section.

The circuit in Figure 1 shows a digital-to-analog video converter paired with a low cost, low power, fully integrated reconstruction video filter with output short-to-battery (STB) protection, ideal for CVBS video transmission in harsh infotainment environments such as automotive applications. Although many video encoders (video DACs), such as the ADV7391, can drive a video load directly, it is often beneficial to use a video driver at the output of a video encoder for power savings, filtering, line driving, and overvoltage circuit protection. The main purpose of a video driver, typically configured as an active filter (also known as a reconstruction filter), is twofold: it blocks the higher frequency components (above the Nyquist frequency) that were introduced into the video signal as part of the sampling process, and it provides gain to drive the external 75 Ω cable to the video display.

Designers of infotainment and other video systems, such as rearview cameras and rear-seat entertainment systems, are likely to use this circuit to transmit video for the reasons previously stated. However, a third pressing design issue centers on the robustness. The ADA4432-1 and ADA4433-1 provide analog video designers with integrated ICs that offer crucial overvoltage protection, hardened ESD tolerance, along with excellent video specification, low power consumption, and wire diagnostic features.

The combination of STB protection and robust ESD tolerance allows the ADA4432-1 and ADA4433-1 to provide superior protection in the hostile environments.

The ADV7391, and ADA4432-1 are fully automotive qualified, which makes both products ideal for infotainment and vision-based safety systems for automotive applications. The ADV7391, ADA4432-1, and the ADA4433-1 are available in a very small LFCSP package ideal for small footprint applications.

Lithium ion (Li-Ion) battery stacks contain a large number of individual cells that must be monitored correctly in order to enhance the battery efficiency, prolong the battery life, and ensure safety. The 6-channel AD7280A devices in the circuit shown in Figure 1 act as the primary monitor providing accurate voltage measurement data to the System Demonstration Platform (SDP-B) evaluation board, and the 6-channel AD8280 devices act as the secondary monitor and protection system. Both devices can operate from a single wide supply range of 8 V to 30 V and operate over the industrial temperature range of −40°C to +105°C.

The AD7280A contains an internal ±3 ppm reference that allows a cell voltage measurement accuracy of ±1.6 mV. The ADC resolution is 12 bits and allows conversion of up to 48 cells within 7 μs.

The AD7280A has cell balancing interface outputs designed to control external FET transistors to allow discharging of individual cells and forcing all the cells in the stack to have identical voltages.

The AD8280 functions independently of the primary monitor and provides alarm functions indicating out of tolerance conditions. It contains its own reference and LDO, both of which are powered completely from the battery cell stack. The reference, in conjunction with external resistor dividers, is used to establish trip points for the over/undervoltages. Each cell channel contains programmable deglitching (D/G) circuitry to avoid alarming from transient input levels.

The AD7280A and AD8280, which reside on the high voltage side of the battery management system (BMS) have a daisychain interface, which allows up to eight AD7280A’s and eight AD8280’s to be stacked together and allows for 48 Li-Ion cell voltages to be monitored. Adjacent AD7280A's and AD8280’s in the stack can communicate directly, passing data up and down the stack without the need for isolation.

The master devices on the bottom of the stack use the SPI interface and GPIOs to communicate with the SDP-B evaluation board, and it is only at this point that high voltage galvanic isolation is required to protect the low voltage side of the SDP-B board. The ADuM1400, ADuM1401 digital isolator, and the ADuM5404 isolator with integrated dc-to-dc converter combine to provide the required eleven channels of isolation in a compact and cost effective solution. The ADuM5404 also provides isolated 5 V to the VDRIVE input of the lower AD7280A and the VDD2 supply voltage for the ADuM1400 and ADuM1401 isolators.

The circuit shown in Figure 1 is a single-supply, low power battery operated, portable gas detector using an electrochemical sensor. The Alphasense CO-AX Carbon Monoxide sensor is used in the example.

Electrochemical sensors offer several advantages for instruments that detect or measure the concentration of many toxic gases. Most sensors are gas specific and have usable resolutions under one part per million (ppm) of gas concentration. They operate with very small amounts of current, making them well-suited for portable, battery powered instruments.

The circuit shown in Figure 1 uses the ADA4505-2, dual micro-power amplifier, which has a maximum input bias current of 2 pA at room temperature and consumes only 10 μA per amplifier. In addition, the ADR291 precision, low noise, micropower reference consumes only 12 μA and establishes the 2.5 V common-mode pseudo-ground reference voltage.

The ADP2503 high efficiency, buck-boost regulator allows single-supply operation from two AAA batteries and consumes only 38 μA when operating in power-save mode.

Total power consumption for the circuit shown in Figure 1 (excluding the AD7798 ADC) is approximately 110 μA under normal conditions (no gas detected) and 460 μA under worst-case conditions (2000 ppm CO detected). The AD7798 consumes approximately 180 μA when operational (G = 1, buffered mode) and only 1 μA in the power-save mode.

Because of the circuit’s extremely low power consumption, two AAA batteries can be a suitable power source. When connected to an ADC and a microcontroller, or a microcontroller with a built-in ADC, battery life can be from over six months to over one year.

The circuit shown in Figure 1 uses the ADF4350 synthesizer with an integrated VCO and an external PLL to minimize spurious outputs by isolating the PLL synthesizer circuitry from the VCO circuit.

Devices with integrated PLLs and VCOs may have feed through from the digital PLL circuitry to the VCO, leading to higher spurious levels due to the close proximity of the PLL circuitry to the VCO.

The circuit shown in Figure 1 uses the ADF4350, a fully integrated fractional-N PLL and VCO that can generate frequencies from 137.5 MHz to 4400 MHz, together with the ADF4153 PLL.

In addition to improvements in spurious performance, another possible advantage of using an external PLL is the possibility of increased frequency resolution. For example, if the ADF4157 PLL is selected in place of the ADF4153, the frequency resolution of the PLL can be as fine as 0.7 Hz.

The ADV7612 is a dual port Xpressview^™ 225 MHz HDMI^® receiver that allows fast switching between two inputs. The circuit shown in Figure 1 shows the use of two ADV7612’s as a quad-input fast switching HDMI receiver.

This circuit shows the expandability of the ADV7612 in applications requiring four multiplexed HDMI inputs of up to 225 MHz TMDS (1080p60, 12 bits per channel; 148.5 MHz LLC pixel clock) or UXGA (1600 × 1200, 10 bits per channel; 162 MHz LLC pixel clock). The circuit offers a cost effective solution to this application and operates over the extended industrial temperature range of −40°C to +85°C.

The AD5933 and AD5934 are high precision impedance converter system solutions that combine an on-chipprogrammable frequency generator with a 12-bit, 1 MSPS (AD5933) or 250 kSPS (AD5934) analog-to-digital converter (ADC). The tunable frequency generator allows an external complex impedance to be excited with a known frequency.

The circuit shown in Figure 1 yields accurate impedance measurements extending from the low ohm range to several hundred kΩ and also optimizes the overall accuracy of the AD5933/AD5934.

Lithium ion (Li-Ion) battery stacks contain a large number of individual cells that must be monitored correctly in order to enhance the battery efficiency and prolong the battery life. The 6-channel AD7280A devices in the circuit shown in Figure 1 act as the primary monitor providing accurate measurement data to the Battery Management Controller (BMC).

The AD7280A contains an internal ±3 ppm reference that allows a cell voltage measurement accuracy of ±1.6 mV. The ADC resolution is 12 bits and allows conversion of up to 48 cells within 7 μs.

The AD7280A, which resides on the high voltage side of the Battery Management System (BMS) has a daisy-chain interface, which allows up to eight AD7280A’s to be stacked together and allows for 48 Li-Ion cell voltages to be monitored. Adjacent AD7280A's in the stack can communicate directly, passing data up and down the stack without the need for isolation. The AD7280A master device on the bottom of the stack uses the SPI interface to communicate with the BMC, and it is only at this point that high voltage galvanic isolation is required in order to protect the low-voltage side of the BMS. The ADuM1201 digital isolator and the ADuM5401 isolator with integrated dc-to-dc converter combine to provide the required six channels of isolation in a compact and cost effective solution.